Influence of Self-Heating Effect on Interface Trap Generation in Highly Flexible Single-Crystalline Si Nanomembrane Transistors

We analyze the interface trap states generated by the self-heating effect in flexible single-crystalline Si nanomembrane (sc-Si NM) transistors. Despite the excellent device performance (Subthreshold swing: similar to 61 mV/dec, I-on/off: similar to 10(9), N-it: similar to 5x10(10) cm(-2), mu(eff): similar to 250 cm(2)/V.s) and mechanical flexibility (R-B,R-min = 1 mm) of sc-Si NM transistors on a polymer substrate, they are vulnerable to thermal reliability issues due to the poor thermal conductivity (kappa < 1 W/m.K) of the polymer substrate. Understanding the detailed mechanism driving heat-related device degradation is key to improving device reliability, life expectancy, and overall device performance. Thus, a charge pumping method was employed to systematically analyze the device degradation caused by the self-heating effect. This enabled the interface trap density to be investigated for the flexible sc-Si NM transistors on a polymer substrate after a bias stress. For comparison, a heat spreading layer (HSL) made using a 1-mu m thick Ag film (kappa similar to 400 W/m.K) was integrated into the sc-Si NM device to mitigate the self-heating effect. The results showed that the interface trap density was proportional to the self-heating effect. This facilitated the fundamental understanding of the self-heating effect of flexible sc-Si NM transistors, opening a robust route to realizing high performance flexible devices using sc-Si NM.