4.7 Article Proceedings Paper

A 124 fJ/Bit Cascode Current Mirror Array Based PUF With 1.50% Native Unstable Bit Ratio

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSI.2019.2927758

关键词

Physical unclonable function; cascode current mirror; high reliability; low power consumption

资金

  1. Kongque Technology Innovation Foundation of Shenzhen [KQJSCX20170727101037551, KQJSCX20180328093500762]
  2. Fundamental Research Foundation of Shenzhen [JCYJ20170818101906654, JCYJ20170302151209762]

向作者/读者索取更多资源

In this paper, we present a novel physical unclonable function (PUF) design based on cascode current mirror array. By using a single-stage cascode amplifier for each PUF cell, the output impedance can be significantly elevated. Compared with a traditional single-stage amplifier-based current-mode PUF, the proposed structure is capable of generating more polarized voltage value for the output node. With an additional digital buffer, the temporal noise can be well-suppressed, and a rail-to-rail digital output can be provided with high native reliability. Moreover, through operating the transistors at the subthreshold region, the overall power consumption can be dramatically reduced. Featuring a compact footprint of 3.23 mu m(2) (i.e. 764 F-2) for each PUF cell, the proposed PUF implementation is validated using 65-nm standard CMOS process. The excellent randomness of the proposed PUF design is verified based on the test results with widely-accepted auto-correlation function and NIST suites. Meanwhile, the PUF's uniqueness is measured with 10 chip prototypes and reported to be 49.94%. In addition, the fabricated PUF chips were also characterized with various environmental influences. With multiple readout (500 times) under the reference operating temperature of 27 degrees C and supply voltage of 1.2 V, the native unstable bit ratio is measured to be as low as 1.50%, which can be further improved to 0.79% by adopting the mainstream temporal majority voting (TMV)-based error correction scheme. Besides, we also evaluate the fabricated PUF chips' reliability under varied operating temperature from -40 degrees C to 120 degrees C and supply voltage from 0.95 to 1.3 V. The averaged bit error rate (BER) per 10 degrees C and BER per 0.1 V are measured to be 0.86% and 1.02%, respectively. Compared with the state-of-the-art implementations, the reliability figure of merit (RFoM) is improved by 1.16 similar to 4.29x, with the influences of the temporal noise, the temperature/supply voltage variations and their ranges comprehensively considered.

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