期刊
IEEE TRANSACTIONS ON POWER ELECTRONICS
卷 34, 期 7, 页码 6818-6833出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TPEL.2018.2874420
关键词
Gallium nitride; power transistors; resonant converters; semiconductor device modeling; silicon carbide
资金
- Cadence Design Systems through a Stanford Graduate Fellowship
- National Science Foundation Graduate Fellowships
- Stanford's SystemX Alliance
- TomKat Center for Sustainable Energy
- Airbus
This paper aims to provide a road map for selecting power devices in soft-switched, megahertz (MHz) frequency power converters. Minimizing C-OSS losses, which occur when charging and discharging the parasitic output capacitor of power semiconductors, is critical to efficient operation. These losses are excluded from manufacturer-provided information, and measurements are either sparse or not reported at all in the existing literature. We report the first high-frequency C-OSS loss data from silicon carbide (SiC) power mosms, with a range of devices tested from 1 to 35 MHz and up to 800 V. In contrast to GaN HEMTs, C-OSS losses in SiC MOSFETs do not increase with dV/dt at these frequencies. A total of 3%-10% of the stored energy is dissipated in the measured SiC MOSFETs. We report new C(OSS)( )loss measurements for vertical silicon MOSFETs and expand on existing measurements for super-junctions, finding high variance in C-OSS losses between devices for both constructions. High C-OSS losses preclude the tested silicon mosms from efficient operation at MHz frequencies. Lastly, we compare devices in soft-switched applications using a loss calculation that includes these C-OSS losses, and demonstrate a 100 W, 17 MHz dc-RF inverter using a custom-packaged SiC MOSFET.
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