Low-Power Current-Mode Interval Type-2 Fuzzy Inference Engine Circuit

A novel strategy for implementation of an analog current-mode interval type-2 fuzzy inference engine circuit with low-power consumption is presented. Previous current-mode architectures rely on minimum/maximum circuits, using current mirrors to perform bounded-difference operations or winner-take-all circuits to mirror the appropriate current among the inputs. It means that currents representing the membership degrees of input fuzzy sets may need to be copied several times to obtain the firing levels of each rule. To avoid this drawback, the proposed method uses high-gain differential amplifiers, operating with low bias currents, as comparators, creating digital signals that indicate the largest/smallest current. It allows digital gates to determine directly which of the currents from the membership degree generator circuits represent the correct solution to the overall inference process. The methodology for developing the system and obtaining the logical expressions is presented. Simulations show that a traditional implementation using min/max circuits presented in the literature consumes 4.4 times more power than the proposed architecture. The circuit was prototyped in TSMC 0.18-mu m technology and its functionality demonstrated by the correct generation of the consequents firing levels. The measured power consumption was 413.42 mu W, including the power from the fuzzifier circuits, with a power supply of 1.2 V.