期刊
IEEE TRANSACTIONS ON ELECTRON DEVICES
卷 66, 期 4, 页码 2017-2022出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2019.2898391
关键词
Process-in-memory (PIM); spin transfer toque magnetic random access memory (STT-MRAM); spintronic processing unit (SPU); von Neumann bottleneck
资金
- National Natural Science Foundation of China [61871008, 61571023]
- International Mobility Project [B16001]
Recently, exploiting emerging nonvolatile memories to implement the process-in-memory (PIM) paradigm have shown great potential to address the von Neumann bottleneck and have attracted extensive research and development. In this paper, we present a novel PIM platform-spintronic processing unit (SPU), within spin transfer toque magnetic random access memory (STT-MRAM). This energy-efficient and reconfigurable PIM platform can perform different tasks-data storage and logic computing-using the same physical fabric that is programmable at the finest grain, i.e., the individual memory cell level, without the need to move data outside the memory fabric. The proposed SPU works just like a typical memory and all the logic functions are achieved through regular memory-like write and read operations with minimal modifications. The functionality and performance are evaluated via hybrid circuit simulations under the 40-nm process technology node. Our proposed SPU is expected to be a feasible PIM platform in the near future, owing to the increasing maturity of STT-MRAM.
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