期刊
JAPANESE JOURNAL OF APPLIED PHYSICS
卷 58, 期 -, 页码 -出版社
IOP PUBLISHING LTD
DOI: 10.7567/1347-4065/ab02e3
关键词
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资金
- MEXT/JSPS Leading Initiative for Excellent Young Researchers (LEADER) program
An asymmetric Schottky tunneling source field-effect transistor (STS FET) is a prospective device structure to suppress the short-channel effect. Recently, we succeeded in the fabrication and operation of a Ge-STS n-channel FETwith TiN and PtGe asymmetric metal source/drain (S/D) on a bulk Ge substrate. However, the Ge-STS p-channel FET has not been demonstrated yet. In this study, we fabricated an asymmetric metal S/D FET with the same S/D structure on a bulk Ge and a Ge-on-Insulator (GOI) substrate. The GOI was made by using the Smart-Cut (TM) technique. The device fabricated on a bulk Ge did not operate. On the other hand, the fabricated FET on a GOI, which has a taper-shaped TiN/Ge source interface, showed STS p-FET behavior. These results suggest that the carrier injection can be improved by the optimization of the device structure. As an auxiliary effect, conventional metal-oxide-semiconductor (MOS) FET operation was also observed, thanks to GOI introduction. We demonstrated both STS mode and MOSFET mode operation in the same device on GOI. (C) 2019 The Japan Society of Applied Physics
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