期刊
IEEE TRANSACTIONS ON ELECTRON DEVICES
卷 66, 期 1, 页码 420-427出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2018.2881972
关键词
3-D neuromorphic system; charge-trap flash (CTF) memory; deep neural network (DNN); spike-time-dependent plasticity (STDP); stacked synapse array; synapse device
资金
- Ministry of Trade, Industry and Energy [10080583]
- Korea Semiconductor Research Consortium support program for the development of future semiconductor devices
This paper proposes a synaptic device based on charge-trap flash memory that has good CMOS compatibility and superior reliability characteristics compared with other synaptic devices. Using hot-electron injection and hot-hole injection, we designed operation methods to implement gradual conductance modulation and spike-timing-dependent plasticity. We demonstrate the feasibility of the device for neuromorphic applications through both a device-level technology computer-aided design simulation and a system-level MATLAB simulation. For the first time, we also propose a 3-D stacked synapse array and present the structure, operation, and process methods. The proposed array architecture features a small area and low process cost and could be a novel solution for neuromorphic systems for implementing deep neural networks.
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