Punch-through impact ionization MOSFET (PIMOS): From device principle to applications

In the present work a punch-through impact ionization MOSFET (PIMOS) is presented, which exploits impact ionization in low-doped body-tied Omega- and tri-gate structures to obtain abrupt switching (3-10 mV/decade) combined with a hysteresis in the I-D(V-DS) and I-D(V-GS) characteristics. The PIMOS device shows an extraordinary temperature stability up to 125 degrees C. The influence of various parameters on device performance as abrupt switch or memory cell is investigated. Reduction of the electrical channel length, i.e. of gate length and/or Substrate doping, reduces the breakdown voltage and hence the DRAM operating voltage, but also increase the I-off. Two architectures for a capacitor-less DRAM cell are demonstrated and evaluated. In addition, a PIMOS n-type hysteretic inverter is demonstrated, which may serve as a IT SRAM cell. (C) 2008 Elsevier Ltd. All rights reserved.