4.3 Article

Parallel symmetric sparse matrix-vector product on scalar multi-core CPUs

期刊

PARALLEL COMPUTING
卷 36, 期 4, 页码 181-198

出版社

ELSEVIER
DOI: 10.1016/j.parco.2010.02.003

关键词

Symmetric sparse matrix vector; multiplication; Unstructured meshes; Multi-core architectures; Memory bounded algorithms

资金

  1. Norwegian Research Council at the University of Oslo

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We present a massively parallel implementation of symmetric sparse matrix-vector product for modern clusters with scalar multi-core CPUs. Matrices with highly variable structure and density arising from unstructured three-dimensional FEM discretizations of mechanical and diffusion problems are studied. A metric of the effective memory bandwidth is introduced to analyze the impact on performance of a set of simple, well-known optimizations: matrix reordering, manual prefetching, and blocking. A modification to the CRS storage improving the performance on multi-core Opterons is shown. The performance of an entire SMP blade rather than the per-core performance is optimized. Even for the simplest 4 node mechanical element our code utilizes close to 100% of the per-blade available memory bandwidth. We show that reducing the storage requirements for symmetric matrices results in roughly two times speedup. Blocking brings further storage savings and a proportional performance increase. Our results are compared to existing state-of-the-art implementations of SpMV, and to the dense BLAS2 performance. Parallel efficiency on 5400 Opteron cores of the Cray XT4 cluster is around 80-90% for problems with approximately 25(3) mesh nodes per core. For a problem with 820 million degrees of freedom the code runs with a sustained performance of 5.2 TeraFLOPs, over 20% of the theoretical peak. (C) 2010 Elsevier B.V. All rights reserved.

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