期刊
NATURE CHEMISTRY
卷 2, 期 8, 页码 661-665出版社
NATURE PUBLISHING GROUP
DOI: 10.1038/NCHEM.719
关键词
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资金
- Intel
- MARCO MSD Center
- Graphene MURI (the Office of Naval Research)
Large-scale graphene electronics requires lithographic patterning of narrow graphene nanoribbons for device integration. However, conventional lithography can only reliably pattern similar to 20-nm-wide GNR arrays limited by lithography resolution, while sub-5-nm GNRs are desirable for high on/off ratio field-effect transistors at room temperature. Here, we devised a gas phase chemical approach to etch graphene from the edges without damaging its basal plane. The reaction involved high temperature oxidation of graphene in a slightly reducing environment in the presence of ammonia to afford controlled etch rate (<= 1 nm min(-1)). We fabricated similar to 20-30-nm-wide graphene nanoribbon arrays lithographically, and used the gas phase etching chemistry to narrow the ribbons down to <10 nm. For the first time, a high on/off ratio up to similar to 10(4) was achieved at room temperature for field-effect transistors built with sub-5-nm-wide graphene nanoribbon semiconductors derived from lithographic patterning and narrowing. Our controlled etching method opens up a chemical way to control the size of various graphene nano-structures beyond the capability of top-down lithography.
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