期刊
NANOTECHNOLOGY
卷 25, 期 40, 页码 -出版社
IOP Publishing Ltd
DOI: 10.1088/0957-4484/25/40/405202
关键词
memristive devices; CMOL; planar geometry
资金
- US Air Force Office of Scientific Research (AFOSR) through MURI [FA9550-12-1-0038]
- US Government's Nano-Enabled Technology Initiative
- National Science Foundation under NSF [ECS-0335765]
Planar memristive devices with bottom electrodes embedded into the substrates were integrated on top of CMOS substrates using nanoimprint lithography to implement hybrid circuits with a CMOL-like architecture. The planar geometry eliminated the mechanically and electrically weak parts, such as kinks in the top electrodes in a traditional crossbar structure, and allowed the use of thicker and thus less resistive metal wires as the bottom electrodes. Planar memristive devices integrated with CMOS have demonstrated much lower programing voltages and excellent switching uniformity. With the inclusion of the Moire pattern, the integration process has sub-20 nm alignment accuracy, opening opportunities for 3D hybrid circuits in applications in the next generation of memory and unconventional computing.
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