Memory and Threshold Resistance Switching in Ni/NiO Core-Shell Nanowires

We report on the first controlled alternation between memory and threshold resistance switching (RS) in single NI/NiO core-shell nanowires by setting the compliance current (I(CC)) at room temperature. The memory RS is triggered by a high I(CC) while the threshold RS appears by setting a low I(CC), and the Reset process is achieved without setting a I(CC). In combination with first-principles calculations, the physical mechanisms for the memory and threshold RS are fully discussed and attributed to the formation of an oxygen vacancy (Vo) chain conductive filament and the electrical field induced breakdown without forming a conductive filament, respectively. Migration of oxygen vacancies can be activated by appropriate Joule heating, and it is energetically favorable to form conductive chains rather than random distributions due to the Vo-Vo interaction, which results in the nonvolatile switching from the off- to the on-state. For the Reset process, large Joule heating reorders the oxygen vacancies by breaking the Vo-Vo interactions and thus rupturing the conductive filaments, which are responsible for the switching from on- to off-states. This deeper understanding of the driving mechanisms responsible for the threshold and memory RS provides guidelines for the scaling, reliability, and reproducibility of NiO-based nonvolatile memory devices.