Void detection in solder bumps with deep learning

Wafer level chip scale packages feature large numbers of solder bumps. These bumps are prone to having voids arising for instance from outgassing during the solder reflow. These voids are considered a reliability risk for the thermo-mechanical strength of the solder connection. Screening of bumps on void percentage is therefore required for quality control. Voids are well captured with X-ray radiography. Void detection in X-ray images is the topic of this paper. The large number of solder bumps necessitates the detection to be automated. In this article we first employ conventional threshold based methods to identify voids. Then, we apply a deep learning model to void percentage detection. We will demonstrate that with a proper training data set deep learning can successfully bin solder bumps on their void percentage.