Developments in nanocrystal memory

Since the 1990s, portable electronic products have been a prominent part of our daily lives; and many of these devices require flash memories. The floating-gate (FG) structure, invented by Sze and Kahng at Bell Labs in 1967, forms the primary technology necessary to construct flash memories(1), Fig. 1a. In order to meet the demands of product miniaturization, the shrinking of transistors has evolved as a method to not only pack more devices into a given area, but also improve the switching speed. In such a situation, conventional nonvolatile memory (FG) suffers from certain physical limitations, such as an insufficient tunneling oxide thickness from the continual scaling down of the device structures(2). Because the floating gate (as a charge storing layer) is conductive, all charge will be lost if a leakage path appears in the tunneling oxide, resulting in a serious reliability issue for memory applications. Discrete nanocrystal memory was first proposed by IBM in 1995, and by the early 2000s researchers were already considering it to be a promising candidate for the solution of the scaling problem(3) (Fig. 1b). In addition, nanocrystal memory has a two bit per cell storage capability due to its discrete electron storing center. This means that more data can be stored in one memory cell, which readily increases the memory density(4).