4.7 Article

Role of Power Hardware in the Loop in Modeling and Simulation for Experimentation in Power and Energy Systems

期刊

PROCEEDINGS OF THE IEEE
卷 103, 期 12, 页码 2401-2409

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JPROC.2015.2460676

关键词

Controller hardware in the loop (CHIL); device under test (DUT); field-programmable gate array (FPGA); hardware under test (HUT); modeling and simulation; power hardware in the loop (PHIL); rest of system (ROS)

向作者/读者索取更多资源

The area of modeling and simulation is a critical aspect in the basic research to commercialization and instantiation cycle. This paper reports on modeling and simulation in the context of verification, validation, and experimentation of power and energy systems and associated electrical apparatus via the utilization of power hardware in the loop (PHIL)-based strategies. PHIL is a powerful technique for testing and demonstration of systems in a rigorous and dynamic manner that is not achievable with other methodologies; however, it must only be conducted with foreknowledge of the technique and its challenges in order to realize its significant benefits. This paper reports on the state of the art in PHIL and its challenges and presents sample case studies illustrating its impact.

作者

我是这篇论文的作者
点击您的名字以认领此论文并将其添加到您的个人资料中。

评论

主要评分

4.7
评分不足

次要评分

新颖性
-
重要性
-
科学严谨性
-
评价这篇论文

推荐

暂无数据
暂无数据