Evaluation of the Effects of Thermal Annealing Temperature and High-k Dielectrics on Amorphous InGaZnO Thin Films by Using Pseudo-MOS Transistors

The effects of annealing temperatures and high-k gate dielectric materials on the amorphous In-Ga-Zn-O thin-film transistors (a-IGZO TFTs) were investigated using pseudo-metal-oxide-semiconductor transistors (Psi-MOSFETs), a method without conventional source/drain (S/D) layer deposition. Annealing of the a-IGZO film was carried out at 150 - 900 degrees C in a N-2 ambient for 30 min. As the annealing temperature was increased, the electrical characteristics of Psi-MOSFETs on a-IGZO were drastically improved. However, when the annealing temperature exceeded 700 degrees C, a deterioration of the MOS parameters was observed, including a shift of the threshold voltage (V-th) in a negative direction, an increase in the subthreshold slope (SS) and hysteresis, a decrease in the field effect mobility (mu(FE)), an increase in the trap density (N-t), and a decrease in the on/off ratio. Meanwhile, the high-k gate dielectrics enhanced the performance of a-IGZO Psi-MOSFETs. The ZrO2 gate dielectrics particularly exhibited excellent characteristics in terms of SS (128 mV/dec), mu(FE) (10.2 cm(-2)/V.s), N-t (1.1 x 10(12) cm(-2)), and on/off ratio (5.3 x 10(6)). Accordingly, the Psi-MOSFET structure is a useful method for rapid evaluation of the effects of the process and the material on a-IGZO TFTs without a conventional S/D layer deposition.