Facile Formation of Graphene P-N Junctions Using Self-Assembled Monolayers

Monolithic and patterned aminopropyltriethoxysilane (APTES) layers are used to create n-doped graphene, graphene p-n junctions, and FET devices containing p-n junctions in the device channel through transfer of CVD graphene onto APTES coated substrates. APTES doping is shown to not result in introduction of defects. I-V measurements of FET devices containing patterned APTES layers show it is possible to control the position of the two current minima (two Dirac points) in the ambipolar p-n junction.