High Performance CMOS Current Mirror Using Class-AB Level Shifted Bulk Driven Flipped Voltage Follower Cell

This paper presents a novel current mirror structure based on level shifted class-AB flipped voltage follower cell, which operates at the supply voltage of 1.2 V. The level shifted class-AB flipped voltage follower cell and regulated cascode structure are used at the input and the output stages to achieve low input resistance and very high output resistance, respectively. A comparison of performance parameters of the proposed current mirror with existing structures shows that the proposed current mirror has a very less current tracking error of 0.99%, high output resistance of 18.7 M Omega, wide bandwidth of 239.245 MHz and low power dissipation of 104 mu W. The proposed circuit has been simulated in Cadence virtuoso analog design environment and layout of the proposed circuit has been designed in Cadence virtuoso layout XL editor using BSIM3V3 180 nm CMOS technology. The post-layout simulation results have also been presented to demonstrate the effectiveness of the proposed circuit.