Compact bell-shaped analog matching-cell module for digital-memory-based associative processors

A compact analog matching-cell module compatible with integration with digital memories has been developed, aiming at building small-area low-power associative processors. The matching cell utilizes bell-shaped current-voltage (I-V) characteristics to create a primitive function of data correlation. The key feature in the present work is the proposal of a calibration scheme that can mitigate the problem of device mismatch caused by process variations. In addition, the matching cell requires only eight n-channel metal-oxide-semiconductor field-effect transistors (NMOS transistors) to implement, enabling a very compact implementation of a matching-cell array. The proof-of-concept chip was fabricated using 0.35 mu m complementary MOS (CMOS) technology, and the concept has been verified by measurement results. A matching time of less than 2.2 mu s at the operating frequency of 33.3 MHz has been shown, which is, in principle, independent of the number of template vectors. Furthermore, the current consumption can be made as small as 80 nA per matching cell when the cell is operated in the subthreshold regime. This matching-cell module, therefore, is promising for building low-power and compact pattern-matching systems in combination with high-density digital memory technologies.