Analytical modelling and simulation of single-gate SOI TFET for low-power applications

In this article, a new two-dimensional (2-D) analytical model of the single-gate (SG) silicon-on-insulator (SOI) tunnel field effect transistors (TFETs) is proposed. The parabolic approximation technique is used to solve the 2-D Poisson equation with suitable boundary conditions. Analytical expressions for surface potential and electric field are derived. The validity of the proposed model is tested for device scaled to 18-nm length and the analytical results are compared with Technology Computer Aided Design (TCAD) simulations.