4.6 Article

HBAR-Based 3.6 GHz Oscillator with Low Power Consumption and Low Phase Noise

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IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TUFFC.2009.1050

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  1. Chip Scale Atomic Clock (CSAC)
  2. Defense Advanced Research Projects Agency (DARPA) [N66001-02-1-8918]

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We have designed and built 2 oscillators at 1.2 and 3.6 GHz based on high-overtone bulk acoustic resonators (HBARs) for application in chip-scale atomic clocks (CSACs). The measured phase noise of the 3.6 GHz oscillator is -67 dBc/Hz at 300 Hz offset and -100 dBc/Hz at 10 kHz offset. The Allan deviation of the free-running oscillator is 1.5 X 10(-9) at one second integration time and the power consumption is 3.2 mW. The low phase noise allows the oscillator to be locked to a CSAC physics package without significantly degrading the clock performance.

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