期刊
IEEE TRANSACTIONS ON POWER ELECTRONICS
卷 29, 期 10, 页码 5204-5217出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TPEL.2013.2293734
关键词
Adjustable duty cycles; multilevel inverter; redundant switching sequences; space vector modulation (SVM); space vector pulse width modulation (SVPWM)
资金
- Directorate For Engineering
- Div Of Electrical, Commun & Cyber Sys [1232031] Funding Source: National Science Foundation
- Div Of Electrical, Commun & Cyber Sys
- Directorate For Engineering [1232070] Funding Source: National Science Foundation
This paper presents a fast and generalized space vector pulse width modulation (SVPWM) scheme for any multilevel inverter. The SVPWM scheme generates all the available switching states and switching sequences based on two simple and general mappings, and calculates the duty cycles simply as if for a two-level SVPWM, thus independent of the level number of the inverter. Because the switching states, duty cycles, and switching sequences are all obtained by simple calculation in the proposed SVPWM scheme, no lookup table is needed and the scheme is computationally fast. The generalized method of generating the switching states (first mapping), calculating the duty cycles, and determining the switching sequence (second mapping) is described in this paper. The scheme is suitable for any reference vector with any modulation index, and can be conveniently extended to meet specific requirements, such as symmetric switching sequences. Compared with prior methods, the SVPWM scheme proposed in this paper provides two more degrees of freedom, i.e., the adjustable switching sequences and duty cycles, thus offering significant flexibility for optimizing the performance of multilevel inverters. The influence of redundant switching sequences in the output phase voltage of inverters is demonstrated for a nine-level inverter. This paper also thoroughly compares the proposed SVPWM scheme with prior methods. Both simulation and experimental results are given.
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