4.5 Article Proceedings Paper

AFTER, an ASIC for the readout of the large T2K Time Projection Chambers

期刊

IEEE TRANSACTIONS ON NUCLEAR SCIENCE
卷 55, 期 3, 页码 1744-1752

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TNS.2008.924067

关键词

CMOS; front-end electronics; mixed analog-digital integrated circuits

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The T2K (Tokai-to-Kamioka) experiment is a long baseline neutrino oscillation experiment in Japan, for which a near detector complex (ND280), used to characterize the beam, will be built 280 m from the target in the off-axis direction of the neutrino beam produced using the 50 GeV proton synchrotron of J-PARC (Japan Proton Accelerator Research Complex). The central part of the ND280 is a detector including 3 large Time Projection Chambers based on Micromegas gas amplification technology with anodes pixelated into about 125,000 pads and requiring therefore compact and low power readout electronics. A 72-channel front-end Application Specific Integrated Circuit has been developed to read these TPCs. Each channel includes a low noise charge preamplifier, a pole zero compensation stage, a second order Sallen-Key low pass filter and a 511-cell Switched Capacitor Array. This electronics offers a large flexibility in sampling frequency (50 MHz max.), shaping time (16 values from 100 ns to 2 mu s), gain (4 ranges from 120 W to 600 fC), while taking advantage of the low physics events rate of 0.3 Hz. Fabricated in 0.35 mu m CMOS technology, the prototype has been validated and meets all the requirements for the experiment so that mass production has been launched at the end of 2007.

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