相关参考文献
注意：仅列出部分参考文献，下载原文获取全部文献信息。Serial addition: Locally connected architectures
Valeriu Beiu et al.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS (2007)
Very fast carry energy efficient computation based on mixed dynamic/transmission-gate full adders
M. Alioto et al.
ELECTRONICS LETTERS (2007)
Reliability and defect tolerance in metallic quantum-dot cellular automata
Mo Liu et al.
JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS (2007)
A novel high-speed and energy efficient 10-transistor full adder design
Jin-Fa Lin et al.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS (2007)
Small fan-in floating-gate circuits with application to an improved adder structure
Jon Alfredsson et al.
20TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS: TECHNOLOGY CHALLENGES IN THE NANOELECTRONICS ERA (2007)
High-speed/low-power mixed full adder chains: Analysis and comparison versus technology
Massimo Alioto et al.
2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11 (2007)
Design of robust, energy-efficient full adders for deep-submicrometer design using hybrid-CMOS logic style
Sumeer Goel et al.
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS (2006)
On single-electron technology full adders
MH Sulieman et al.
IEEE TRANSACTIONS ON NANOTECHNOLOGY (2005)
Majority multiplexing-economical redundant fault-tolerant designs for nanoarchitectures
S Roy et al.
IEEE TRANSACTIONS ON NANOTECHNOLOGY (2005)
Simple and systematic design of FA cell using K map
Kamal Kumar Sharma
IEICE ELECTRONICS EXPRESS (2005)
Parallel information and computation with restitution for noise-tolerant nanoscale logic networks
AS Sadek et al.
NANOTECHNOLOGY (2004)
Trends and challenges in VLSI circuit reliability
C Constantinescu
IEEE MICRO (2003)
A majority-logic device using an irreversible single-electron box
T Oya et al.
IEEE TRANSACTIONS ON NANOTECHNOLOGY (2003)
End of Moore's law: thermal (noise) death of integration in micro and nano electronics
LB Kish
PHYSICS LETTERS A (2002)
Intrinsic fluctuations in sub 10-nm double-gate MOSFETs introduced by discreteness of charge and matter
AR Brown et al.
IEEE TRANSACTIONS ON NANOTECHNOLOGY (2002)
Analysis and comparison on full adder block in submicron technology
M Alioto et al.
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS (2002)
Binary adders of multigate single-electron transistors: Specific design using pass-transistor logic
Y Ono et al.
IEEE TRANSACTIONS ON NANOTECHNOLOGY (2002)
Performance analysis of low-power 1-bit CMOS full adder cells
AM Shams et al.
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS (2002)
A novel high-performance CMOS 1-bit full-adder cell
AM Shams et al.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS (2000)
Multigate single-electron transistors and their application to an exclusive-OR gate
Y Takahashi et al.
APPLIED PHYSICS LETTERS (2000)
分享论文
