期刊
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
卷 61, 期 8, 页码 3034-3042出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TMTT.2013.2271835
关键词
BiCMOS integrated circuits; microwave circuits; microwave limiters
资金
- TNO through the Dutch Ministry of Economical Affairs
- Thales NL
A series of limiters have been developed for power levels up to 58 dBm in a standard 0.25-mu m BiCMOS process. After a thorough analysis of general design tradeoffs, a figure-of-merit (FOM) for limiter technologies is introduced. This FOM indicates the necessity of a high current-to-capacitance ratio, which is obtained by exploiting the base-collector junction. Two designs were implemented for operation up to S- and X-band with optimized power capability for the respective frequency bands. The proposed designs avoid dedicated technologies like PIN-diodes or gas discharge tubes and thus enable integration of the limiter in a receiver front-end chip. The limiters have been designed based on a diode model, which was carefully extracted from measurements on a single diode cell. Reliability aspects, specific to limiters, are discussed. The measurements on the S-band limiter showed that 58 dBm pulses with 10-mu s length can be handled, which is similar to power levels obtained by commercial PIN diode limiters.
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