期刊
IEEE TRANSACTIONS ON ELECTRON DEVICES
卷 61, 期 7, 页码 2515-2522出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2014.2325068
关键词
Drain-induced barrier lowering (DIBL); I-ON/I-OFF ratio; OFF-state current I-OFF; ON-state current I-ON; Schottky-barrier tunneling FET (SB-TFET); subthreshold swing (SS)
资金
- Department of Science and Technology, Government of India [SB/S3/EECE/0117/2013]
- University Grants Commission, Government of India [37-397/2009/SR]
It is known that a pocket at the drain end of a Schottky barrier tunneling FET (SB-TFET) helps to improve the device performance in terms of greatly suppressed ambipolar current and reduced drain-induced barrier lowering (DIBL). A detailed investigation, with the help of a numerical device simulator, of the impact of using such a pocket either at the source end or at both the source and the drain ends of an SB-TFET is reported for the first time in this paper. The performance of the above-mentioned two devices is compared with a device having a pocket at the drain end and a conventional MOSFET. Optimization of the barrier height and the pocket parameters is made before performance comparison. It is observed that a pocket at the drain end helps suppress the ambipolar current and reduce both the subthreshold swing and the DIBL. On the other hand, a pocket at the source end helps to improve the ON-state current ION. Using a pocket at both the source and the drain ends results in overall improvement of the device performance. The effects of scaling on such device performance parameters are also reported.
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