期刊
IEEE TRANSACTIONS ON ELECTRON DEVICES
卷 60, 期 12, 页码 4199-4205出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2013.2283465
关键词
Disturb; embedded memory; endurance; ferroelectric field-effect-transistor (FeFET); V-DD/3 scheme
资金
- EFRE fund of the European Commission
- Free State of Saxony
Ferroelectric Si: HfO2 has been investigated starting from metal-ferroelectric-metal (MFM) capacitors over metal-ferroelectric-insulator-semiconductor (MFIS) and finally ferroelectric field-effect-transistor (FeFET) devices. Endurance characteristics and field cycling effects recognized for the material itself are shown to also translate to highly scaled 30-nm FeFET devices. Positive-up negative-down as well as pulsed I-d-V-g measurements illustrate how ferroelectric material characteristics of MFM capacitors can also be identified in more complex MFIS and FeFET structures. Antiferroelectric-like characteristics observed for relatively high Si dopant concentration reveal significant trapping superimposed onto the ferroelectric memory window limiting the general program/erase endurance of the devices to 10(4) cycles. In addition, worst case disturb scenarios for a V-DD/2 and V-DD/3 scheme are evaluated to prove the viability of one-transistor memory cell concepts. The ability to tailor the ferroelectric properties by appropriate dopant concentration reveals disturb resilience up to 10(6) disturb cycles while maintaining an ION to I-OFF ratio of more than four orders of magnitude.
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