4.6 Article

Negative Differential Resistance Circuit Design and Memory Applications

期刊

IEEE TRANSACTIONS ON ELECTRON DEVICES
卷 56, 期 4, 页码 634-640

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2009.2014194

关键词

Metal-oxide-semiconductor field-effect transistor (MOSFET); NDR-based static random access memory (SRAM); negative differential resistance (NDR); peak-to-valley current ratio (PVCR)

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Based on a circuit point of view, a high-performance negative differential resistance (NDR) element is designed and a possible compact device implementation is presented. The NDR structure exhibits ultrahigh peak-to-valley current ratio and also high switching speed. The corresponding process and design are completely compatible with contemporary Si CMOS technology, as they rely on coupled transistor structures. A single-NDR element static-random-access-memory cell prototype with a compact size and high speed is proposed as an interesting application suitable for embedded memory.

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