期刊
IEEE TRANSACTIONS ON ELECTRON DEVICES
卷 55, 期 5, 页码 1185-1191出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2008.919385
关键词
filamentary conductance; memory circuit; resistive memory; resistive random access memory (ReRAM)
Resistive random access memory consisting of NiO resistive memories and control transistors was fabricated with 0.18-mu m CMOS technology. An initial forming voltage as low as 2 V was achieved with thin NiO film, and a reset current lower than 100 mu A was realized by using the current limit of a selected cell transistor in the set process (1T-1R). The current level was determined by its gate voltage, resulting in the control of electrical resistance of the filamentary conductive paths in the low resistive state. Furthermore, a large voltage increase in the reset operation, which may cause an undesirable set operation, was also suppressed by a voltage-clamp transistor connected to the 1T-1R cell in series. On the basis of these proposed switching schemes, the stable pulse operation was demonstrated successfully. In addition, both nonvolatile data retention at 150 degrees C and operation in a wide temperature range (from -40 degrees C to 150 degrees C) were confirmed.
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