Active EMI Reduction of Stationary Clocked Systems by Adapted Harmonics Cancellation

Active cancellation of disturbing signals is a common method in EMC. In this paper, a specialized strategy is presented to minimize the disturbing harmonics of stationary clocked systems by injecting an appropriate harmonic cancellation signal with an adjustable signal synthesizer. The optimum cancellation signal is found via a convenient and robust adaptive approach. Each destructive harmonic is generated individually, and the cancelation signal is the superposition of a set of sinusoidal signals. As a special feature of this method, many troublesome effects, like delays or complex frequency characteristics, can be compensated easily. Several implementation variants can be derived from this general approach. Here, the variant, continuously adapted harmonics cancellation (CAHC), is considered. The system's limitations due to the ADC, the DAC, and the synchronization are described. An FPGA-implementation of CAHC is presented and applied to a dc/dc converter in an automotive component measurement setup to demonstrate the effectivity of the method.