4.7 Article Proceedings Paper

A Hardware-Scalable DSP Architecture for Beam Selection in mm-Wave MU-MIMO Systems

期刊

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSI.2018.2856124

关键词

Beam selection; hybrid beamformer; beamspace MIMO; mm-wave; CORDIC

资金

  1. Ministry of Science and Technology, Taiwan [MOST 103-2220-E-009-020, MOST 105-2622-E-194-001-CC1]
  2. Center for Electronics Technology Integration through The Featured Areas Research Center Program within Higher Education Sprout Project by the Ministry of Education (MOE), Taiwan

向作者/读者索取更多资源

Millimeter-wave (mm-Wave) communication, operating from 30- to 300-GHz bands with wider available spectrum, has now emerged as a promising solution for future wireless systems. To reduce the hardware complexity of mm-Wave transceivers, beam-selection techniques combined with beamspace multiple-input multiple-output (MIMO) communications have been proposed in the literature. In such a system, beam selection is performed to exploit the near-sparse nature in the mm-Wave channel and, hence, is crucial to the system performance. This paper presents the world's first digital signal processing (DSP) architecture design for beam selection operation in an mm-Wave multi-user MIMO system. A computationally efficient beam-selection algorithm is first presented. Based on the proposed algorithm, a hardware-scalable beam selection processor is implemented using coordinate rotation digital computers arithmetic. To establish the validity of the concept, the proposed processor is implemented in a 40-nm CMOS technology, integrating 360k logic gates in an area of 0.5625 mm(2), while dissipating 44 mW at 266 MHz in an MU-MIMO system with 16 beams and 8 users.

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