4.7 Article

Electrothermal Design Procedure to Observe RF Circuit Power and Linearity Characteristics With a Homodyne Differential Temperature Sensor

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSI.2010.2072372

关键词

CMOS temperature sensor; differential temperature sensing; electrothermal coupling; electrothermal IC design; homodyne measurement method; low-noise amplifier (LNA); on-chip temperature gradient measurement; radio frequency (RF); built-in test (BIT); radio frequency (RF) power detector

资金

  1. Texas A&M University-Consejo Nacional de Ciencia y Tecnologia
  2. National Science Foundation [ECCS-0824031]
  3. Spanish project [TEC2008-01856]

向作者/读者索取更多资源

The focus in this paper is on the extraction of RF circuit performance characteristics from the dc output of an on-chip temperature sensor. Any RF input signal can be applied to excite the circuit under examination because only dissipated power levels are measured, which makes this approach attractive for on-line thermal monitoring and built-in test scenarios. A fully differential sensor topology is introduced that has been specifically designed for the proposed method by constructing it with a wide dynamic range, programmable sensitivity to dc, and RF power dissipation, as well as compatibility with CMOS technology. This paper also presents an outline of a procedure to model the local electrothermal coupling between heat sources and the sensor, which is used to define the temperature sensor's specifications as well as to predict the thermal signature of the circuit under test. A prototype chip with an RF amplifier and temperature sensor was fabricated in a conventional 0.18-mu m CMOS technology. The proposed concepts were validated by correlating RF measurements at 1 GHz with the measured dc voltage output of the on-chip sensor and the simulation results, demonstrating that the RF power dissipation can be monitored and the 1-dB compression point can be estimated with less than 1-dB error. The sensor circuitry occupies a die area of 0.012 mm, which can be shared when several on-chip locations are observed by placement of multiple temperature-sensing parasitic bipolar devices.

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