4.6 Article

A Highly Integrated 1.8 GHz Frequency Synthesizer Based on a MEMS Resonator

期刊

IEEE JOURNAL OF SOLID-STATE CIRCUITS
卷 44, 期 8, 页码 2154-2168

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSSC.2009.2022914

关键词

CMOS MEMS integration; compact and programmable PLLs; high resolution; MEMS based phase-locked loops and synthesizers; MEMS crystal replacement; MEMS resonators thermal tuning; silicon carbide MEMS and CMOS; transimpedance amplifier for MEMS resonators; tunable MEMS

资金

  1. McGill
  2. NSERC
  3. FQRNT
  4. ReSMiQ

向作者/读者索取更多资源

A highly integrated 1.7-2.0 GHz digitally programmable frequency synthesizer using a MEMS resonator as its reference is presented. Due to the dimensions of the MEMS device (e. g., 25 mu m by 114 mu m), the entire system with a total area of 6.25 mm(2) can be housed in a small standard chip package. This considerably reduces the form factor and cost of the system, compared to using an external crystal as a reference. The MEMS resonators are clamped-clamped beams fabricated using a CMOS-compatible process. The main structural layer is made of silicon carbide, which provides the resonators with higher power handling capabilities and higher operating frequencies, compared to silicon. The resonators are electrostatically and thermally tunable-an 8.4% frequency tuning is demonstrated for a 9 MHz resonator. The 100 nm vertical transducer gaps of the resonators allow the use of electrostatic actuation voltages as low as 2 V. An integrated high gain-bandwidth trans-impedance amplifier (TIA) is combined with a resonator to generate the synthesizer's input reference signal. The TIA employs automatic gain control to mitigate the inherent low power handling capabilities and the non-linearities of the MEMS device, thus minimizing their effect on phase noise. The fractional-synthesizer employs a 3rd-order 20-bit delta-sigma modulator to deliver a theoretical output resolution of similar to 11 Hz, in order to allow for high output frequency stability when used with an appropriate feedback loop. A fully integrated on-chip dual path loop filter is used to maintain a high level of system integration. With a supply voltage of 2 V, the phase noise for a 1.8 GHz output frequency and a similar to 12 MHz reference signal is -122 dBc/Hz at a 600 kHz offset, and -137 dBc/Hz at a 3 MHz offset.

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