CMOS Inverter Based on Schottky Source-Drain MOS Technology With Low-Temperature Dopant Segregation

This letter demonstrates the integration of complementary dopant-segregated Schottky barrier MOSFETs into CMOS inverters. The implementation of a valence-band-edge silicide, namely, PtSi, associated to arsenic (As) and boron (B) low-temperature segregation is validated for the first time at the circuit level. Current drives for n- and p-type devices are I-on = 596/378 mu A/mu m at V-ds = vertical bar 1.1 V vertical bar and vertical bar V-gs vertical bar = 2 V to account for the 2.4-nm gate oxide thickness. Excellent inverter voltage transfer characteristics, large voltage gain, and appreciable noise margins have been obtained down to 0.5 V of supply voltage.