4.6 Article

Tetragonal ZrO2/Al2O3 Stack as High-κ Gate Dielectric for Si-Based MOS Devices

期刊

IEEE ELECTRON DEVICE LETTERS
卷 31, 期 9, 页码 1014-1016

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2010.2053191

关键词

Al2O3; grain boundaries; high-kappa gate dielectric; nitridation; passivation; tetragonal ZrO2

资金

  1. National Science Council of Taiwan [NSC 98-2221-E-007-119, NSC 98-2120-M-009-005]

向作者/读者索取更多资源

The combination of tetragonal ZrO2 (t-ZrO2) and amorphous Al2O3 was explored as the gate dielectric for Si-based MOS devices. Because of the absence of a ZrSiO4 and/or ZrSi interfacial layer, the thermally stable t-ZrO2/Al2O3/Si stack is more eligible than the Al2O3/t-ZrO2/Si stack for the gate dielectric since it demonstrates larger capacitance, smaller hysteresis, better frequency dispersion, lower leakage current, and more robust reliability. By employing additional NH3 plasma nitridation to well passivate the grain boundaries of the t-ZrO2 film, without compromising its kappa-value, a greatly reduced leakage current of 2.9 x 10(-8) A/cm(2) can be achieved at gate bias of flatband voltage (V-fb)-1 V with an effective oxide thickness of 1.64 nm, which paves a new way to develop a high-performance crystalline gate dielectric for advanced MOS devices.

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