High-Performance Silicon Nanowire Gate-All-Around nMOSFETs Fabricated on Bulk Substrate Using CMOS-Compatible Process

In this letter, a novel self-aligned CMOS-compatible method for the fabrication of gate-all-around silicon nanowire MOSFETs (GAA SNWFETs) on bulk substrate has been proposed. The fabricated SNWFET featuring 33-nm gate length and 7-nm diameter shows the highest driving current (I-on = 2500 mu A/mu m at V-ds = V-gs = 1.0 V) among previously reported data and achieves high I-on/I-off ratio of 10(5), lightening the promise for high performance and strong scalability of GAA SNWFETs. The process details and optimization procedure are extensively discussed.