In situ surface passivation and CMOS-compatible palladium-germanium contacts for surface-channel gallium arsenide MOSFETs

In this letter, we report a novel n-channel GaAs MOSFET featuring TaN/HfAlO/GaAs gate stack with in situ surface passivation (vacuum anneal and silane treatment), alternative gold-free palladium-germanium (PdGe) source and drain (S/D) ohmic contacts, and silicon plus phosphorus coimplanted S/D regions. With the novel in situ surface passivation, excellent capacitance-voltage characteristics with low-frequency dispersion and small stretch-out can be achieved, indicating low interface state density. This surface-channel GaAs device exhibits excellent transistor output characteristics with a high drain current on/off ratio of 10(5) and a high peak electron mobility of 1230 cm(2)/V . s. In addition, gold contamination concerning CMOS technology can be alleviated with the successful integration of low-resitance PdGe ohmic contacts.