Journal
ELECTRONICS LETTERS
Volume 48, Issue 21, Pages 1333-1334Publisher
INST ENGINEERING TECHNOLOGY-IET
DOI: 10.1049/el.2012.2624
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Funding
- MKE (The Ministry of Knowledge Economy), Korea, under the ITRC (Information Technology Research Center) [NIPA-2012-H0301-12-3002]
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Computational power of embedded graphics processing units (GPUs) in mobile system-on-chips has been increasing steadily to provide high quality user experience related to 2D and 3D graphics. Moreover, the architecture of embedded GPUs is evolving from graphic accelerators into streaming multiprocessors, which enables programmers to use GPUs for general parallel processing. Workload variations in mobile GPU applications are explored to discover the potential of dynamic voltage and frequency scaling (DVFS) on embedded GPUs. A DVFS framework which considers GPUs as computing devices, not graphic accelerators, is proposed. The experimental results show that a conventional processor DVFS policy can achieve power reduction of embedded GPUs with reasonable performance degradation.
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