4.3 Article Proceedings Paper

Fringing fields in sub-0.1 mu m fully depleted SOI MOSFETs: optimization of the device architecture

Journal

SOLID-STATE ELECTRONICS
Volume 46, Issue 3, Pages 373-378

Publisher

PERGAMON-ELSEVIER SCIENCE LTD
DOI: 10.1016/S0038-1101(01)00111-3

Keywords

SOI; MOSFET; DIBL; full depletion; short-channel effects; fringing field

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Lateral field penetration in the buried oxide (BOX) and underlying substrate of fully depleted SOI MOSFETs is responsible for a dramatic increase of short-channel effects. An original compact model of the latter phenomena is proposed and used to explore optimized architectures of sub-100 nm transistors. Various architectures including the ground-plane MOSFET, are compared using a quasi-2D analysis in order to evaluate the contribution of the BOX to short-channel effects. (C) 2002 Elsevier Science Ltd. All rights reserved.

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