4.7 Article

Limits to binary logic switch scaling - A Gedanken model

Journal

PROCEEDINGS OF THE IEEE
Volume 91, Issue 11, Pages 1934-1939

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JPROC.2003.818324

Keywords

closely pocked devices; device scaling limits; digital integrated circuits; heat removal; nanotechnology; power consumption; tunneling

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In this paper we consider device scaling and speed limitations on irreversible von Neumann computing,that arc derived from the requirement of least energy computation. We consider computational systems whose material realizations utilize electrons and energy barriers to represent and manipulate their binary representations of state.

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