Fabrication of ferroelectric gate memory device using BLT/HfO2/Si gate structure

Ferroelectric gate FET's with BLT/HfO2 structure were fabricated on 5-inch-scale Si wafer using well-refined CMOS compatible 0.8 mum-based fabrication processes for the first time. We obtained excellent device characteristics and good memory operations of the fabricated n-ch and p-ch MFIS-FET's, in which the memory window and on/off drain current ratio of typical p-ch memory device were measured to be 1.5 V at V-G of +/-5 V and 8 orders-of-magnitude, respectively. We also confirmed by evaluating the gate voltage and gate size dependences of device properties that the fabricated devices showed quantitatively reasonable ferroelectric memory operations.