Journal
MICROELECTRONICS RELIABILITY
Volume 46, Issue 1, Pages 1-23Publisher
PERGAMON-ELSEVIER SCIENCE LTD
DOI: 10.1016/j.microrel.2005.02.001
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An overview of the evolution of transistor parameters under negative bias temperature instability stress conditions commonly observed in p-MOSFETs in recent technologies is presented. The physical mechanisms of the degradation as well as the different defects involved have been discussed according to a systematic set of experiments with different stress conditions. According to our findings, a physical model is proposed which could be used to more accurately predict the transistor degradation. Finally, based on our new present understanding, a new characterization methodology is proposed, which would open the way to a more accurate determination of parameter shifts and thus allowing implementing the degradation into design rules. (c) 2005 Elsevier Ltd. All rights reserved.
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