Journal
IEEE TRANSACTIONS ON POWER ELECTRONICS
Volume 15, Issue 3, Pages 431-438Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/63.844502
Keywords
phase-locked loop; utility interface
Categories
Ask authors/readers for more resources
The analysis and design of the phase-locked loop (PLL) system is presented for the phase tracking system of the three phase utility interface inverters, The dynamic behavior of the closed loop PLL system is investigated in both continuous and discrete-time domains, and the optimization method is considered for the second order PLL system. In particular, the performance of the three phase PLL system is analyzed in the distorted utility conditions such as the phase unbalancing, harmonics, and offset caused by the nonlinear load conditions and measurement errors. The tracking errors under these distorted utility conditions are also derived. The phase tracking system is implemented in a digital manner using a digital signal processor (DSP) to verify the analytic results. The design considerations for the phase tracking system are deduced from the analytic and experimental results.
Authors
I am an author on this paper
Click your name to claim this paper and add it to your profile.
Reviews
Recommended
No Data Available