3.8 Article

Hardware technology for the HITACHI MP5800 series (HDS Skyline Series)

Journal

IEEE TRANSACTIONS ON ADVANCED PACKAGING
Volume 23, Issue 3, Pages 504-514

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/6040.861567

Keywords

bipolar LSI; CMOS LSI; coolant distribution unit; MLC; packaging; power supply

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The HITACHI MP5800 series (HDS Skyline Series(TM1)) has been developed as the top-of-the-line member of the M Parallel Series general computer family, Its highlights include the highest processor performance, dramatically reduced installation requirements (footprint and power consumption), and enhanced reliability and availability. To achieve these goals, innovative technologies have been developed: semiconductor technology called Advanced CMOS-ECL (ACE), which combines high speed emitter coupled logic (ECL) and high density complementary metal oxide semiconductor (CMOS) circuits, 1 module processor, which employs a glass ceramic substrate, a high density packaging scheme whereby up to four instruction processors (IPs) are mounted on a single printed wiring board, a cooling technology for large scale integration (LSI) chips with a power consumption as high as 140 W/chip, and a compact high-efficient power supply system.

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