4.4 Article

The H1 silicon vertex detector

Publisher

ELSEVIER SCIENCE BV
DOI: 10.1016/S0168-9002(00)00488-5

Keywords

silicon vertex detector; ASIC chip

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The design, construction and performance of the H1 silicon vertex detector is described. It consists of two cylindrical layers of double-sided, double-metal silicon sensors read out by a custom designed analog pipeline chip. The analog signals are transmitted by optical fibres to a custom-designed ADC board and are reduced on PowerPC processors. Details of the design and construction are given and performance figures from the first data-taking periods are presented. (C) 2000 Elsevier Science B.V. All rights reserved.

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