Journal
SOLID-STATE ELECTRONICS
Volume 45, Issue 2, Pages 373-377Publisher
PERGAMON-ELSEVIER SCIENCE LTD
DOI: 10.1016/S0038-1101(00)00234-3
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Effects of direct tunneling and surface roughness on the capacitance-voltage characteristics of ultra-thin gate deep submicron MOS transistors have been studied. An improved equivalent circuit model to account for surface roughness and direct tunneling on the ultra-thin gate MOS capacitors in a unified manner is proposed. The capacitance subject to direct tunneling and surface roughness effect is smaller than that without surface roughness effect. (C) 2001 Elsevier Science Ltd. All rights reserved.
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