Journal
IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY
Volume 11, Issue 1, Pages 816-819Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/77.919469
Keywords
Josephson effect; lift-off process; Nb technology; RIE process; SIS junction; SIS mixer; SIS receiver; SNEAP process; submillimeter receiver; superconducting tunnel junction
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Fabrication procedure and yield analysis of superconducting integrated receivers is reported. These chip receivers, apart from the quasi-optical SIS mixers, contain internal local oscillators and associated rf and de interfaces. Due to both complexity and design requirements of the integrated circuit, certain restrictions are applied to the standard Nb/Al/AlxOy/Nb SNEAP process. To obtain accurate area for micron-size SIS junctions and thickness for multi-layer SiO2 insulation, a few solutions and modifications were developed. The possibility of transfering this fabrication process worldwide has been proven experimentally.
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