4.6 Article

Linearity and low-noise performance of SOI MOSFETs for RF applications

Journal

IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 49, Issue 5, Pages 881-888

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/16.998598

Keywords

CMOS; linearity; LNA; MOSFET; noise; RF; SOI

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The MOSFET parameters important for RF application at GHz frequencies: a) transition frequency, b) noise figure, and c) linearity are analyzed and correlated with substrate type. This work demonstrates that, without process changes, high-resistivity silicon-on-insulator (high-p SOI) substrates can successfully enhance the RF performance of on-chip inductors and fully depleted (FD)-SOI devices in terms of reducing substrate losses and parasitics. The linearity limitations of the SOI low-breakdown voltage and kink effect are addressed by judicious device and circuit design. Criteria for device optimization are derived. A NF = 1.7 dB at 2.5 GHz for a 0.25 mum FD-SOI low-noise amplifier (LNA) on high-p SOI substrate obtained the lowest noise figure for applications in the L and S-bands.

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