4.6 Article

On the performance of low-noise low-dc-power-consumption cryogenic amplifiers

Journal

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
Volume 50, Issue 6, Pages 1480-1486

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TMTT.2002.1006408

Keywords

empirical large-signal models; FET; FET noise models; modeling; noise model extraction; noise parameter

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The performance of broad-band low-noise low-dc-power-consumption cryogenic amplifiers have been studied in detail with emphasis on minimizing the power consumption and optimizing the amplifier performance at cryogenic temperature. A general approach is presented for the modeling and amplifier design, which helps in minimizing the power consumption and optimizing the performance of the amplifier. A noise temperature below 9 K and 22-dB gain was experimentally obtained in the frequency range of 4-8 GHz with a total power consumption of 4 mW with commercial GaAs transistors.

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