Electron transport in strained Si inversion layers grown on SiGe-on-insulator substrates

We show by simulation that electron mobility and velocity overshoot are greater when strained inversion layers are grown on SiGe-On-insulator substrates (strained Si/SiGe-OI) than when unstrained silicon-on-insulator (SOI) devices are employed. In addition, mobility in these strained inversion layers is only slightly degraded compared with strained bulk Si/SiGe inversion layers, due to the phonon scattering increase produced by greater carrier confinement. Poisson and Schroedinger equations are self-consistently solved to evaluate the carrier distribution in this structure. A Monte Carlo simulator is used to solve the Boltzmann transport equation. Electron mobility in these devices is compared to that in SOI inversion layers and in bulk Si/SiGe inversion layers. The effect of the germanium mole fraction x, the strained-silicon layer thickness, T-Si, and the total width of semiconductor (Si+SiGe) slab sandwiched between the two oxide layers, T-w were carefully analyzed. We observed strong dependence of the electron mobility on T-Si, due to the increase in the phonon scattering rate as the silicon layer thickness is reduced, a consequence of the greater confinement of the carriers. This effect is less important as the germanium mole fraction, x, is reduced, and as the value of T-Si increases. For T-Si>20 nm, mobility does not depend on T-Si, and maximum mobility values are obtained. (C) 2002 American Institute of Physics.